1. Field of the Invention
The present invention relates to semiconductor photodiodes, in particular to high frequency, broad spectral range, silicon photodiodes.
2. Prior Art
A growing demand in high-speed photodetectors stimulated creation of a new generation of photodiodes capable of working in NIR (near IR) spectral range with close to 100% quantum efficiency (QE). FIG. 1 represents traditional structures, using single-pass normal incidence absorption regions that are coupled to the transit time, and are not able to decouple the requirements of speed and efficiency from the design parameters of depletion volume and working voltage. Novel approaches may be used to achieve wider bandwidth of over 30 Gb/s with 100% QE using III-V hetero-structures but are not applicable to main stream production. Intensive studies toward creating very fast and highly sensitive photodiodes were performed during the last several years with III-V compound structures based on InP—GaInAsP. The ideas explored include but are not limited to side-illuminated photodiodes, evanescently coupled photodiodes, and those with either an integrated taper or graded-index waveguides.
The idea of creating a waveguide-type Si photodiode is very attractive because it offers a relatively inexpensive, novel design that would be useful in many applications. A few designs based on a waveguide-type Si structures are known in the literature. FIGS. 2A, 2B and 2C present a lateral waveguide detector using a diffraction principle to direct the radiation into a top surface waveguide, while FIG. 3 presents a light trap to capture the radiation in the detector's sensitive region. These designs make use of highly reflective distributed Bragg reflectors (DBR) fabricated using a commercially available double-SOI process, internal total reflection of V-grooves made on the chip back surface, buried reflecting mirror, lateral pin photodiode structure with alternating p-type and n-type doped fingers, and a waveguide-grading-coupler built on the surface of a planar Si photodiode with a buried oxide layer. Each of those photodiodes has drawbacks that limit their application.
The following more detailed discussion of the prior art assumes a p-on-n structure; it is understood that the same device can be made with an n-on-p structure where the names of the anodes and cathodes reversed. Referring now to the drawings, FIG. 1 shows a prior art photodiode with a depletion region 40 designed to separate and capture the generated electron hole pairs. This region is depleted by bias applied to the anode 10 and cathode 20 of the device. The top passivation glass 30 and a metal contact 50 are also shown. As the wavelength increases and the associated absorption length increases, the depletion region 40 must be made deeper requiring more voltage or higher resistivity material to support the depletion. This then presents a diode, which is optimized for the selected wavelength. It is desirable to provide a technique to eliminate this wavelength dependence. The elimination of this dependence points towards a surface region waveguide type of detector.
FIGS. 2A, 2B and 2C show an attempt to accomplish a waveguide design for the p-on-n structure. FIG. 2A, top view, shows the anode 10 and cathode 20 with the active waveguide region 40 located between them. FIGS. 2B and 2C shows side cross-sections, through the anode and cathode respectively, in which the isolation oxide (or buried Bragg mirror) 30 and substrate support 60 are apparent. The issue is to get the light to enter into the top surface of the silicon, and remain there until it is converted into an electrical signal. This detector utilizes a diffraction technique to bend the light wave as it enters the surface of the silicon, so that it moves laterally along the material surface in the sensitive region of the detector. The issue here is that the diffraction grid 55 is both inefficient and wavelength dependent.
FIG. 3 presents another attempt to form a surface detector. It focuses upon the use of repeated reflections at an angle that invokes total internal reflection; hence the light becomes trapped in the surface of the silicon. The issue here is the topside electrode and mirror 70 causes a loss due to surface reflection before the light enters the silicon. This patent teaches that a KOH etch will form grooves in a <100> wafer by selectively etching along a preferential crystalline plane (100) forming an angle of ˜54.7°, which is the angle between the [111] and [100] directions. The material 35 is an optical adhesive bonding the silicon 40 to a substrate wafer 60.
The present invention also has its own limitations; however, it out performs the designs mentioned above with respect to a number of important parameters. Most importantly, this design is relatively easy to fabricate in Silicon using dielectrically isolated (DI) wafers similar to those used for photovoltaic cell fabrication.